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National CP3BT26 manuals

Owner’s manuals and user’s guides for Hardware National CP3BT26.
We providing 1 pdf manuals National CP3BT26 for download free by document types: User Manual


National CP3BT26 User Manual (278 pages)


Brand: National | Category: Hardware | Size: 4.11 MB |

 

Table of contents

Bluetooth

1

, USB, and CAN Interfaces

1

Table of Contents

2

2.0 Features

3

3.0 Device Overview

4

7 www.national.com

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3.21 POWER MANAGEMENT

7

3.22 DMA CONTROLLER

7

3.23 SERIAL DEBUG INTERFACE

7

3.24 DEVELOPMENT SUPPORT

7

4.0 Signal Descriptions

8

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5.0 CPU Architecture

15

5.5 ADDRESSING MODES

18

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5.6 STACKS

19

5.7 INSTRUCTION SET

19

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6.0 Memory

24

8.0 Flash Memory

31

8.3 FLASH MEMORY OPERATIONS

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8.4 INFORMATION BLOCK WORDS

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8.5 FLASH MEMORY INTERFACE

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REGISTERS

35

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9.0 DMA Controller

41

9.3 OPERATION MODES

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9.4 SOFTWARE DMA REQUEST

43

9.5 DEBUG MODE

43

The upper 8 bits of the AD

44

– Channel inactive

46

10.0 Interrupts

47

10.5 NESTED INTERRUPTS

50

11.0 Triple Clock and Reset

51

11.1 EXTERNAL CRYSTAL NETWORK

52

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11.2 MAIN CLOCK

53

11.3 SLOW CLOCK

53

11.4 PLL CLOCK

53

12.0 Power Management

56

13.0 Multi-Input Wake-Up

61

13.2 PROGRAMMING PROCEDURES

66

14.0 Input/Output Ports

67

– Slow slew rate

70

– Fast slew rate

70

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14.2 OPEN-DRAIN OPERATION

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15.0 Bluetooth Controller

72

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15.2 SERIAL INTERFACE

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D0D14A0A1A2A3A4WH0H1H2 D15

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D0D1A0A1A2A3A4RH0H1H2 D15

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Description

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16.1 FUNCTIONAL DESCRIPTION

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16.2 TOUCHSCREEN INTERFACE

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16.4 FREEZE

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16.5 ADC REGISTER SET

83

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17.1 FREEZE

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17.2 RANDOM NUMBER GENERATOR

89

REGISTER SET

89

18.0 USB Controller

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18.2 ENDPOINT OPERATION

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18.3 USB CONTROLLER REGISTERS

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—This mode is

102

—Setting this bit al

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—The TOGGLE

106

—The TOGGLE bit

106

—This bit indi

106

—This bit is set if a

106

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—A value of 0 in

107

—This bit reflects

107

18.4 TRANSCEIVER INTERFACE

108

19.0 CAN Module

109

19.2 BASIC CAN CONCEPTS

110

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19.3 MESSAGE TRANSFER

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19.4 ACCEPTANCE FILTERING

119

19.5 RECEIVE STRUCTURE

120

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+ CONTROL

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19.7 INTERRUPTS

125

19.8 TIME STAMP COUNTER

126

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19.9 MEMORY ORGANIZATION

127

→ RX_BUSY0.)

129

→ RX_BUSY1.)

129

→ RX_BUSY2.)

129

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19.12 USAGE HINT

142

20.0 Advanced Audio Interface

143

TXDSA = 1

144

TXDSA = 0

144

RXDSA = 1

144

RXDSA = 0

144

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20.3 BIT CLOCK GENERATION

146

20.4 FRAME CLOCK GENERATION

146

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20.6 COMMUNICATION OPTIONS

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21.1 OPERATION

158

21.2 PCM CONVERSIONS

158

21.8 FREEZE

160

. If set, this bit en

161

22.0 UART Modules

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22.3 UART REGISTERS

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22.4 BAUD RATE CALCULATIONS

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23.0 Microwire/SPI Interface

175

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23.2 MASTER MODE

177

23.3 SLAVE MODE

178

23.4 INTERRUPT GENERATION

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24.0 ACCESS.bus Interface

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24.4 USAGE HINTS

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25.1 TWM STRUCTURE

192

25.2 TIMER T0 OPERATION

192

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25.3 WATCHDOG OPERATION

193

25.4 TWM REGISTERS

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25.5 WATCHDOG PROGRAMMING

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PROCEDURE

195

26.0 Multi-Function Timer

196

26.2 TIMER OPERATING MODES

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26.3 TIMER INTERRUPTS

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26.4 TIMER I/O FUNCTIONS

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26.5 TIMER REGISTERS

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27.2 VTU REGISTERS

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28.0 Register Map

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29.0 Register Bit Fields

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30.1 ABSOLUTE MAXIMUM RATINGS

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30.6 OUTPUT SIGNAL LEVELS

247

30.7 CLOCK AND RESET TIMING

247

Figure 110. Clock Timing

248

Figure 111. NMI Signal Timing

248

Figure 113. Power-On Reset

248

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30.8 UART TIMING

249

30.9 I/O PORT TIMING

250

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30.11 MICROWIRE/SPI TIMING

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30.12 ACCESS.BUS TIMING

258

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Figure 128. ACB Data Timing

260

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30.16 EXTERNAL BUS TIMING

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31.0 Pin Assignments

269

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(LQFP-144)

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32.0 Revision History

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